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Job Duties:
1. Work with ASIC architect to define micro architecture specification of major functional blocks
2. Utilize your design skill to develop RTL code in Verilog/System Verilog HDL and produce high performance, low power, optimized design netlist using industry standard synthesis tools. Resolve timing issues through static timing analysis
3. Work with DV engineers to define test plan and coverage analysis, resolve all design issues by debugging with DV engineers in a timely manner
4. Work with physical design engineers to resolve any issues arising from backend flow requirement, including DFT, power optimization, timing closure, etc.
5. Participate in pre-silicon validation using FPGA platform, and post silicon bring up on EVB
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Requirement:
1. BSEE or equivalent is a must, MSEE is preferred
2. Ideal candidate should have minimally 3-7 years of IC design experience
3. Familiar with Verilog/System Verilog design flow with industry standard EDA tools
4. Domain knowledge in networking ASICs, such as Ethernet PCS/MAC layer or higher layer in IP stack, is definitely a plus
5. Experienced with unix/linux scripting language such as perl, tcl, Python, etc.
6. Familiar with AHB / APB / Axi protocol, understanding arm architecture and debugger working principle is preferred
7. Good English communication and documentation skill is a plus
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崗位職責
1、制定數(shù)字邏輯電路模塊的規(guī)格文檔；
2、運用硬件描述語言（Verilog/System Verilog等）完成數(shù)字電路的模塊設計；
3、協(xié)助驗證工程師完成模塊驗證, 對驗證計劃提出建議并積極參與驗證覆蓋率分析。 及時解決模塊中的bugs；
4、協(xié)助后端設計工程師完成物理實現(xiàn)；
5、參與芯片測試；
任職資格
1、電子類、通信、集成電路等相關專業(yè)碩士學歷；
2、3-5年及以上工作經(jīng)驗；
3、熟悉硬件描述語言，如Verilog、System Verilog等；
4、熟悉腳本語言，如perl、tcl, Python等；
5、有網(wǎng)絡芯片設計經(jīng)驗， 特別是擁有以太網(wǎng)底層電路， 協(xié)議棧知識的員工會給與優(yōu)先考慮；
6、 熟悉AHB/APB/AXI協(xié)議，了解arm架構(gòu)及debugger工作原理優(yōu)先;
7、具備優(yōu)秀的團隊合作和溝通協(xié)調(diào)能力。
福利待遇:
1、固定工資、年底獎金、績效獎金、期權激勵、晉升培訓、每年固定調(diào)薪；
2、五險一金，補充醫(yī)療保險、享有國家規(guī)定的法定節(jié)假日及帶薪年假（年假、婚假、產(chǎn)假、病假）等待遇；
3、周末雙休、彈性工作時間；
4、定期團建、下午茶歇、過節(jié)福利、團隊聚餐、生日蛋糕、定期體檢；
5、公司提供免費單身公寓，環(huán)境好；
6、辦公環(huán)境舒適，地鐵10號線直達，附近多個公交站點，交通十分便利。
注：辦公地址：浦口。